The present invention relates to a flyback converter with improved synchronous rectification. In particular, the present invention relates to a flyback converter including a delay circuit on a primary side of the converter that imposes a transient in advance of the regular primary switching pulse to trigger shut down of the rectifier switch on the secondary side of the converter and improve synchronous rectification.
It has become common to incorporate synchronous rectification control in flyback converters that makes use of voltage and current sensing across the rectifier MOSFET. One non-limiting example of such a control circuit is assignee International Rectifier Corporation's IR1167 SmartRectifier control IC.
Such control circuits generally perform quite well in Discontinuous Current Mode (DCM) and Critical Conduction Mode (CrCM) devices, or converters, however, there are some problems when these control circuits are utilized in Continuous Current Mode (CCM) devices. Specifically, the voltage sensing technique used by such circuits typically does not ensure efficient synchronous rectification turn OFF in CCM devices. This is primarily due to the fast transients that results when the primary power transistor is hard switched into the ON position. Specifically, the fast transients do no allow the rectifier switch to turn off quickly enough. This results in rather significant and undesirable reverse currents running through the rectifier switch.
Accordingly, it would be beneficial to provide a flyback converter with synchronous rectification that avoids the problems noted above.